Dynamic random-access memory

Results: 789



#Item
51256Mb: x4, x8, x16 SDRAM Features SDR SDRAM MT48LC64M4A2 – 16 Meg x 4 x 4 banks MT48LC32M8A2 – 8 Meg x 8 x 4 banks

256Mb: x4, x8, x16 SDRAM Features SDR SDRAM MT48LC64M4A2 – 16 Meg x 4 x 4 banks MT48LC32M8A2 – 8 Meg x 8 x 4 banks

Add to Reading List

Source URL: www.micron.com

Language: English - Date: 2015-05-20 13:49:58
52Energy Efficient Power Gating Architecture using NV-SRAM & NV-FF Associate Prof. Satoshi SUGAHARA (Tokyo Institute of Technology) 1. Abstract A new power-gating architecture using non-volatile SRAM (NV-SRAM) and non-vola

Energy Efficient Power Gating Architecture using NV-SRAM & NV-FF Associate Prof. Satoshi SUGAHARA (Tokyo Institute of Technology) 1. Abstract A new power-gating architecture using non-volatile SRAM (NV-SRAM) and non-vola

Add to Reading List

Source URL: www.jst.go.jp

Language: English - Date: 2015-01-14 21:20:23
53F R A U N H O F E R R E S E A R C H I N S T I T U T I O N F O R O R G A N I C S , M AT E R I A L S A N D E L E C T R O N I C D E V I C E S C O M E D D  Vdd write<2>

F R A U N H O F E R R E S E A R C H I N S T I T U T I O N F O R O R G A N I C S , M AT E R I A L S A N D E L E C T R O N I C D E V I C E S C O M E D D Vdd write<2>

Add to Reading List

Source URL: www.comedd.fraunhofer.de

Language: English - Date: 2015-06-18 03:04:02
54Enabling Technologies for Multilevel Phase-Change Memory H. Pozidis, N. Papandreou, A. Sebastian, A. Pantazi, T. Mittelholzer, G. F. Close and E. Eleftheriou IBM Research – Zurich, CH-8803 Ruschlikon, Switzerland, emai

Enabling Technologies for Multilevel Phase-Change Memory H. Pozidis, N. Papandreou, A. Sebastian, A. Pantazi, T. Mittelholzer, G. F. Close and E. Eleftheriou IBM Research – Zurich, CH-8803 Ruschlikon, Switzerland, emai

Add to Reading List

Source URL: www.epcos.org

Language: English - Date: 2011-11-23 11:13:29
55Precise Management of Scratchpad Memories for Localising Array Accesses in Scientific Codes Armin Gr¨ oßlinger University of Passau Department of Informatics and Mathematics

Precise Management of Scratchpad Memories for Localising Array Accesses in Scientific Codes Armin Gr¨ oßlinger University of Passau Department of Informatics and Mathematics

Add to Reading List

Source URL: www.infosun.fim.uni-passau.de

Language: English - Date: 2009-04-06 06:30:34
56Notes on The Chinn-Ito Financial Openness Index 2013 Update May 1, 2015 Hiro Ito ()

Notes on The Chinn-Ito Financial Openness Index 2013 Update May 1, 2015 Hiro Ito ()

Add to Reading List

Source URL: web.pdx.edu

Language: English - Date: 2015-05-01 01:12:44
57EN164: Design of Computing Systems Lecture 25: Memory Systems 1 Professor Sherief Reda http://scale.engin.brown.edu Electrical Sciences and Computer Engineering School of Engineering

EN164: Design of Computing Systems Lecture 25: Memory Systems 1 Professor Sherief Reda http://scale.engin.brown.edu Electrical Sciences and Computer Engineering School of Engineering

Add to Reading List

Source URL: scale.engin.brown.edu

Language: English - Date: 2014-03-23 13:26:57
58A Framework for Emulating Non-Volatile Memory Systems with Different Performance Characteristics Dipanjan Sengupta1,2, Qi Wang1,3, Haris Volos1, Lucy Cherkasova1, Guilherme Magalhaes1, Jun Li1, Karsten Schwan2

A Framework for Emulating Non-Volatile Memory Systems with Different Performance Characteristics Dipanjan Sengupta1,2, Qi Wang1,3, Haris Volos1, Lucy Cherkasova1, Guilherme Magalhaes1, Jun Li1, Karsten Schwan2

Add to Reading List

Source URL: icpe2015.ipd.kit.edu

Language: English - Date: 2015-02-07 13:19:34
59Blackcomb: Hardware-Software Co-design for NonVolatile Memory in Exascale Systems Perspectives on Blackcomb Simulation Tools Jeffrey Vetter, ORNL Robert Schreiber, HP Labs Trevor Mudge, University of Michigan Yuan Xie, P

Blackcomb: Hardware-Software Co-design for NonVolatile Memory in Exascale Systems Perspectives on Blackcomb Simulation Tools Jeffrey Vetter, ORNL Robert Schreiber, HP Labs Trevor Mudge, University of Michigan Yuan Xie, P

Add to Reading List

Source URL: xstackwiki.modelado.org

Language: English - Date: 2014-05-28 15:44:50
60Technical Brief  Accelerating Reads & Writes with IntelliFlash™ Tegile Intelligent Flash Arrays enable enterprises to strike the perfect balance between performance and capacity. Each array is powered by the IntelliFla

Technical Brief Accelerating Reads & Writes with IntelliFlash™ Tegile Intelligent Flash Arrays enable enterprises to strike the perfect balance between performance and capacity. Each array is powered by the IntelliFla

Add to Reading List

Source URL: pages.tegile.com

Language: English - Date: 2015-05-24 09:15:04